For years RISC-V has been an obscure side project of the chip industry hiding in the shadow of two giants - x86 and ARM ecosystems. Till recently the most significant achievement of the RISC-V platform has been a 32-bit RISC-V core called SweRV released by Western Digital in February 2019. WD developed SweRV based processors to use in their flash controllers and … [Read more...] about RISC-V and Open POWER Instruction Set Architecture (ISA) Fortunes are Rising, Market Analysis